Usually, by the word “flip-flop”, we understand one on and another off. That is the usual reason behind searching our guide on Arduino Flip-Flop Blinking LED With Push Button. While that is true (to some extent) as a visual effect, for the advanced flip-flop, we need to know some theory. When we are programming 2-3 LEDs, the logic remains easy, hence we could avoid the theoretical part.
Flip-flops are typically part of a larger electronic device. In professional circuit development, flip-flops are hardly used as individual components anymore. Typically, components are used which, in addition to flip-flops, consist of other circuit functions in a common component. This includes FPGA, PLD and ASIC components. These devices typically include D-flip-flops (explained later).
A flip-flop is an electronic circuit that has two stable states of the output signal. The current state depends not only on the currently existing input signals but also on the state that existed before the time under consideration. There is no dependence on time, but only on events.
Due to the stability, the tilt stage can store a data volume of one bit over an unlimited period. For this purpose, however, unlike non-volatile data storage, the power supply must be guaranteed permanently. As the basic building block of sequential circuits, the flip-flop is an indispensable component of digital technology and thus a fundamental component of many electronic circuits from the quartz watch to the microprocessor. In particular, elementary one-bit memory is the basic element of static memory modules for computers.
Classification based on clock dependency
Since the input signals are only stable in certain periods, it is often desired that a flip-flop only reacts to the input signals at certain times. This behaviour can be realized by using a clock signal that unlocks the flip-flop’s control inputs for specific events. Taking into account a clock signal allows synchronicity with other circuit parts and the formation of synchronous circuits. Here it is important to distinguish in which way a flip-flop takes clock signals into account.
Such flip-flops are called asynchronous level-triggered flip-flops. However, there is also the possibility that a flip-flop changes its state only during a level change of the input signals and the level of the input signal itself has no further influence. Such flip-flops are called asynchronous edge-triggered flip-flops. In the past, differentiating elements were used for practical implementation. Nowadays, the signal flanks are usually internally transformed into short needle pulses with the help of runtime differences, or they are evaluated directly by volatile internal states.
RS flip-flop: S stands for set, R stands for reset. An RS flip-flop is the simplest type of flip-flop. This basic element records any of its two possible output states for any length of time. A change is possible via its two inputs, which are usually referred to as R and S. With additional circuits, this results in both clock level-controlled RS flip-flops and clock-flank-controlled RS flip-flops. Then there is a third input, typically designated C (clock), to which a clock signal can be applied. Other flip-flops also build on this basic element.
D-Flipflop: The D-flip-flop (abbreviated for data or delay flip-flop) is used to delay the signal at the data input until it is released synchronously to a clock edge. It has a data input D and a dynamic input C (clock). Alternatively, D flip-flops can contain a static input E in addition to the data input D.
JK flip-flop: JK flip-flops are occasionally they called jump/kill flip-flops. They are based on the asynchronous RS flip-flop, but are flank-controlled or run as a master-slave flip-flop.
T-flip-flop: The synchronous T-flip-flop has a T-input in addition to the dynamic C-clock input. T stands for the toggle. If the T-input is fixed to “1”, the previous clock input C gets the function of signal input. Since there is no connection to a clock, this execution is called an asynchronous T-flip-flop. Although the input signal does not have to occur periodically, it is sometimes also called a clock signal.