RISC or Reduced Instruction Set Computing is a type of design of Central Processing Unit which are generally used in microprocessors or microcontrollers. After our article on ARM Architecture, it appeared to us that; there are quite good number of readers who are interested in the topics of core computing. Practically, the in last two decades; the computing on commercial side, created a kind of new users. We can not blame this segment of new users, they actually has been injected the buzz of Giga Hertz clock speed, instead of knowing what we need and what is enough for our usage. Before reading this article on RISC or Reduced Instruction Set Computing; those who are newer to computing (using computers after 1990), consider to read the article on Microcomputer.
Philosophy and Design of RISC or Reduced Instruction Set Computing
The story of RISC or Reduced Instruction Set Computing is not of today. One of the basic design principles for all processors is to add speed to provide a very fast memory to store information temporarily, these memories are known as records . For example, each CPU includes a command to add two numbers. The basic operation of a CPU would to load those records add them together and store the result in another register; finally, take the result of the last record and return to the main memory. However, records have the disadvantage of being somewhat complex to implement. Each is represented by the transistors on the chip, in this aspect the main memory tends to be more simple and economic. In addition, the records added to the wiring is complex, because the central processing unit needs to be connected to each and every one of the records to use them equally. While RISC design philosophy was being formed, new ideas began to emerge with a single purpose: to dramatically increase CPU performance.
We are taking about early eighties. I was a mere boy. Many readers actually has seen the gradual transition. In the early eighties it was thought that the existing designs were reaching their theoretical limits. The improvements in speed in the future would be made ??based on improved processes, i.e. small features in the chip. The complexity of the chip could continue as before, but a smaller size would result in better performance of it to operate at higher clock speeds. They put a lot of effort in designing the chips for parallel computing, with communication links. The working idea was – Instead of making the faster chips, a large amount of chips would be used, dividing the total speed between them. However, history has shown that these fears did not become reality and there were a number of ideas that dramatically improved performance at the end of the eighties.
Today’s microcontrollers and RISC CPU represent the vast majority of all the CPU used. It is not anymore powerless. The RISC design technique now provides power even in small devices, and this has come to completely dominate the CPU market with low power consumption.
Other notes on RISC or Reduced Instruction Set Computing
Due to the redundancy of the microinstructions, operating systems designed for such microprocessors, has the ability to subdivide to help a microprocessor in several ways, reducing the number of redundant instructions for each instance. With an optimized software architecture, visual environments developed for these platforms, contemplating the possibility of running multiple tasks in a single clock cycle. Also, the RAM memory paging was dynamic and was allocated a sufficient amount to each instance, and there is a kind of ‘symbiosis’ between the power of the microprocessor and RAM dedicated to each instance of it.
Examples of modern RISC designs will be ARM, PowerPC and newer versions of SPARC and MIPS to name a few.